1. Field of the Invention
The present invention relates to a printed circuit board (PCB) having a buried solder bump and a manufacturing method thereof.
2. Description of the Related Art
With the recent advancement of electronics industries, there is a demand for increasing performance and functionality of electronic components and reducing the size thereof. Accordingly, high integration, slimness and fine circuit patterning are also required on a substrate for surface mounting components, such as SIP (System in Package), 3D package, etc.
In particular, in techniques for mounting electronic components on the surface of a substrate, a wire bonding process or a flip chip bonding process is utilized for electrical connection between a semiconductor chip and a PCB.
The wire bonding process includes bonding a semiconductor chip having design circuits to a PCB using an adhesive, connecting a lead frame of the PCB to a metal terminal (i.e., pad) of the semiconductor chip using a metal wire to transmit and receive information therebetween, and molding the electronic device and the wire with thermosetting resin or thermoplastic resin.
The flip chip bonding process includes forming an external connection terminal (i.e., bump) having a size of tens of μm to hundreds of μm on a semiconductor chip using a material such as gold, solder or another metal, and flipping the semiconductor chip having the bump so that the surface thereof faces the substrate and is thus mounted on the substrate, unlike the mounting operation based on the wire bonding.
Although the wire bonding process has higher productivity compared to other packaging processes, it needs wires for connection to the PCB, and thus the size of a module is increased and an additional procedure is required. Hence, the flip chip bonding process is mainly employed.
FIG. 1 is a cross-sectional view showing a PCB having a solder bump for use in flip chip bonding according to a conventional technique.
As shown in FIG. 1, the PCB 10 for flip chip bonding according to the conventional technique includes an insulating layer 12, a pad formed on the insulating layer 12, a solder resist layer 16 having an opening for exposing the pad 14, and a solder bump 18 formed on the pad 14 to dispose it between the PCB 10 and a semiconductor chip so as for electrical connection therebetween.
However, the PCB for flip chip bonding according to the conventional technique and the manufacturing method thereof have the following problems.
Because the pad 14 which is formed on the insulating layer 12 is exposed by the opening formed in the solder resist layer 16, height difference between the pad 14 and the solder resist layer 16 may be caused, and thereby the degree of matching between the solder bump 18 and the pad 14 is lowered, undesirably decreasing bonding reliability.
Also, when the pad 14 is formed on the high-density substrate through a plating process, deviations in height of the pad 14 may be caused by plating tolerance. So, in the case where the amount of solder to be printed is small, problems in which the solder bump 18 is not connected to the semiconductor chip may occur.
Also, in the course of forming the opening in the solder resist layer 16 to expose the pad 14, height difference occurs between the pad 14 and the opening, and thus the printing of the solder bump 18 becomes non-uniform.
Also, in order to ensure electrical connection reliability between the semiconductor chip and the PCB 10, a coining process for flattening the upper surface of the solder bump 18 to result in a uniform height should be conducted. Because the coining process is performed for each unit, a lead time is undesirably lengthened.